20101028:

        New version 1.4 boards are now available that resolve the version 1.3 modification needs. There is an easy to implement modification for the new board that will provide an improvement in spectrum purity. The information can be found under Modification 1.4-1.


20090405:


        I found a high temperature epoxy overcoat product, Chemtronics, part number CW2500, specifically intended for masking bare PCB pads prior to oven soldering. The detailed information may be found under Modification 3 .
               
 20090307:
                     For those that wish to populate the NS3 boards using solder paste and oven soldering there is a need to mask some vias. As previously mentioned these boards were manufactured without solder mask over the vias. This was done to facilitate debugging and experimentation as it provides exposed connection points to many of the the traces.  However, there are four, non analog ground vias under the DDS chip which in all probability will become solder paste shorted to analog ground if they are not masked. These exposed vias normally have a minimal clearance to the analog ground pad under the DDS however the solder paste would fill that gap. With manual soldering of this pad from under the board solder does not normally reach these vias and the clearance from the thickness of the surrounding solder mask should provide isolation as long as these vias have not been exposed to solder. However solder paste applied in the normal fashion from the top side of the board would most likely be applied to these exposed vias would bond to the DDS analog ground pad. These vias must be masked before applying paste and even for manual soldering it would be a good precautionary measure to provide solder mask protection. A minuscule dab of enamel paint applied from the tip of a needle over the vias should work. If anyone knows a better method please let me know. Further details and photographs are provided in the PC Board Modification 3 information.

20090307:
                    The EEPROM WP (write protect) input pin 7 was left floating. Although this has not caused any known problems with NS3 operation to this date it is a poor design practice to leave an input pin floating. The data sheet states that this pin should either be grounded for normal operation or pulled high to implement write protection. Fortunately it is very easy to ground this pin with the existing version 1.3 PC board artwork design. Since the ground plane circles the floating pad it is just a matter of scraping a small amount of solder mask off  the ground plane and solder bridging the narrow gap with some solder. The schematics have been updated on this web site to show the WP pin grounded. Also the artwork for the next board version has been updated. Credit goes to Jim, KC2QFE for identifying this oversight. 
Further details and photographs are provided in the PC Board Modification 4 information.
 
20090129:
                            The parts list was reformatted so that it would again fit properly on two sheets of letter size paper as it once did prior to the addition of the new "Data Chnaged" column.
20090128:
                     Whilst working on a revised JTAG CrossConnect PC Board artwork I noticed an error in the silkscreen pin numbering. The Pins 1 & 2 and Pins 9 & 10 silkscreen lettering for the 10 pin connector is reversed. Proper connector orientation can be confirmed by checking for continuity between pin 2 of the 10 pin ribbon cable SIP connector to pin 1 of the 20 pin ribbon header. This is the +3.3V power cross connection line. Care is needed to ensure these cables are oriented properly.
20090127:
                    Whilst putting together another NS3 module I noticed the protection diode D1 I actually have in stock is different than the one in the parts list. I decided to review this diode selection once more and found DigiKey have a lower forward voltage drop diode for about 1/3 the cost. It provides reverse protection for up to 40V which should be more than adequate. I have updated the parts list once more reflecting this new selection. Please note that this diode is not particularly critical thus if you have already ordered a diode it will, with little doubt, do the job just fine as long as it is in an DO-114, SMA package and is of the Schottky type.
20090123:
                    The NimbleSig III parts list was updated to version 1.3.5 to clarify the manufactures part number and the package designation for the D1 protection diode. Credit belongs to Al, N0TVJ for identifying  the need for clarification.
20081221:
                     During tests of the 230 MHz low pass filters a 125 MHz spur (¼ the DDS clock frequency) was noticed on the “A” generator output at a relative amplitude of -50dB or lower. This spur does not appear on the “B” output and may be related to the slight difference in the ground plane between sides A and B. I have no reason to believe that it is related to the 230 MHz LPF modification. I noticed in general the “B” output is the cleanest output of the two thus I recommend it be used for the more critical signal need in an application. This seems to be consistent with both 200 MHz and 230 MHz filter equipped units. I also noticed the 500 MHz clock spur is between 40 and 50 dB down. It may be possible to reduce this spur by trial and error tuning the 500 MHz traps in the filters. I have not tried to do this at the time of this writing.
20081219:
                    The value of C51, the MPU clock coupling capacitor shown in the figure 4 schematic of part 1 of my NimbleSig III article in QEX Magaizine is much too high and in accordance with Murphy's Law may, in some cases, prevent the start up of the LPC2138. The value of C51 shown as 0.1uF in part 1 figure 4 should be changed to 100pF. I have updated the schematic which can be downloaded from  http://www3.telus.net/ta/NimbleSig%20III/NS3%20Schematics .